MEMS Digital Verification Engineer

Role Overview

The Digital Verification engineer will be part of the digital verification team of MEMSs GROUP and will follow the ASIC verification process from specification definition to final product industrialization.

What You Will Do

Define and develop verification testbench, develop verification components, develop DSP models and digital control logic, test case development for simulation, debugging failures and creating simulation cases for various scenarios.

Why It Might Be a Fit

The ideal candidate will have 3-5 years of experience in digital verification, knowledge of Universal Verification Methodology and System Verilog, and experience with digital simulator tools.

Requirements

• 3-5 years of experience in digital verification
• Background in digital verification testbench (Universal Verification Methodology and System Verilog)
• Knowledge of System Verilog and experience with digital simulator tools
• Universal Verification Methodology, System Verilog Assertion, coverage, self-checking capabilities, testbench automation, bugs analysis and reporting
• Basic knowledge of python scripts, TCL scripts, version control system
• Knowledge of formal verification and communication protocols (e.g. I2C, SPI and I3C)

Benefits

• Diverse and inclusive workplace
• Equity in career development and career opportunities
• Equal remuneration
• Opportunities for growth and learning