Analog Design, Staff Engineer - SERDES

Designing and developing full custom analog circuit macros for high-speed SERDES PHY IP, including transceivers, voltage/current-mode drivers, PLLs, DLLs, equalizers (CTLE, FFE, DFE), impedance calibrators, serializers/deserializers, VCOs, phase interpolators, bandgap references, and clock data recovery circuits. Collaborating with cross-functional teams locally and globally to refine circuit implementations and achieve optimal power, area, and performance targets.

Requirements

• Bachelor’s (BE) plus 5 years or Master’s (MTech) plus 4 years of relevant experience in mixed-signal analog/custom circuit design.
• Strong understanding of CMOS circuit design fundamentals, device physics, layout, parasitic extraction, and sub-micron methodologies.
• Expertise in analog transistor-level circuit design in nanometer technologies.
• Familiarity with multi-Gbps high-speed designs and protocols such as PCIe, Ethernet, SATA, and USB.
• Proficiency in SPICE simulation, static timing analysis (STA), and using digital/CMOS logic cells for high-performance datapath design.
• Experience with ESD/latch-up design verification and crosstalk coupling analysis in mixed-signal environments.

Benefits

• We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.