PhD Position in High-Performance CMOS Receiver and Analog-to-Digital Converter Design

Join the ERC Synergy DISRUPT project to reinvent receiver and ADC architectures for next-generation wireless communication. Design time-domain receivers and ADCs and validate them on real silicon.

Requirements

• M.Sc. degree in Microelectronics, Electrical Engineering, or a closely related field.
• Strong background in analog, mixed-signal, and RF circuit design.
• Hands-on RTL design experience (SystemVerilog, Verilog, or Verilog-AMS).
• Demonstrable creativity and originality in problem solving and circuit design.
• Good presentation, writing, and communication skills.
• Strong command of English (spoken and written).
• Ability to work effectively in an international and collaborative research environment.
• Strong team player with excellent communication skills to collaborate smoothly with international colleagues.

Benefits

• 4-year period of employment
• Customisable compensation package
• Discounts on health insurance
• Monthly work costs contribution
• Flexible work schedules
• TU Delft Graduate School
• Dual Career Programme