Senior Staff Hardware Architect / Architecte matériel Senior Staff H/F

Senior Staff Hardware Architect will define, optimize, and evolve cache coherency solutions within Arteris' advanced IP portfolio. The role involves developing cutting-edge cache-coherent interconnect IP, ensuring seamless integration with other NoC interconnects and system IP, and collaborating with hardware designers, verification engineers, software developers, product teams, and customer-facing teams to deliver high-performance, power-efficient, and reliable NoC IP solutions.

Requirements

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field
• Proven experience as a Cache Coherency Architect, SoC/NoC Architect, or senior design engineer
• In-depth knowledge of SoC and NoC architectures, cache coherency protocols, and memory hierarchies
• Strong analytical, problem-solving, and system-level thinking skills
• Excellent communication and collaboration abilities

Benefits

• Estimated Base Salary: €65,000 to €85,000 annually
• Final compensation will be determined based on experience, and internal equity for similar roles