Technical Lead Design Verification Engineer

Astera Labs is seeking a Technical Lead Design Verification Engineer to contribute to the functional verification of complex ASICs. The ideal candidate will have a strong academic and technical background in electrical engineering, ≥5 years' experience verifying and validating complex SoC, and knowledge of industry-standard simulators, revision control systems, and regression systems.

Requirements

• Strong academic and technical background in electrical engineering
• ≥5 years' experience verifying and validating complex SoC for Server, Storage, and Networking applications
• Knowledge of industry-standard simulators, revision control systems, and regression systems
• Professional attitude with the ability to prioritize a dynamic list of multiple tasks, and work with minimal guidance and supervision
• Entrepreneurial, open-minded behavior and can-do attitude