IC Package Design / Development

We are seeking an experienced IC Packaging Engineer to drive next-generation package architecture, design, and productization using advanced node silicon (7nm, 5nm, 3nm and beyond).

Requirements

• Bachelors and 8+ years or Masters degree and 6+ years or PhD and 3+ years of related experience;
• BS/MS/PhD in Electrical Engineering (Preferred), Mechanical Engineering, Materials Science, or related field.
• Extensive hands-on experience in advanced IC packaging for advanced silicon nodes.
• Expertise in substrate design, SI/PI principles, thermal management, and high-speed IO packaging.
• Strong understanding of high layer count, large body, flip chip BGA packaging technology
• Proficiency in Cadence Allegro APD/SIP or comparable packaging design tools.
• Experience working with global OSATs and substrate suppliers.
• Proven ability to drive NPI through HVM with strong cross-functional leadership.
• Excellent communication, documentation, and customer-facing skills.

Benefits

• Medical, dental and vision plans
• 401(K) participation including company matching
• Employee Stock Purchase Program (ESPP)
• Employee Assistance Program (EAP)
• company paid holidays
• paid sick leave and vacation time
• Paid Family Leave and other leaves of absence