Sr Principal Design Engineer

We are looking for a Sr Principal Verification Engineer to lead verification efforts for advanced IP development.

Requirements

• Develop and maintain UVM-based verification environments for IP-level verification.
• Perform debugging of complex IP designs and resolve issues efficiently.
• Review and enhance verification test plans for completeness and coverage.
• Drive testbench development, simulation, and regression strategies.
• Mentor and guide junior engineers in verification best practices.
• Collaborate with cross-functional teams for seamless integration and delivery.

Benefits

• Competitive compensation and benefits