ASIC Verification Engineer

Role Overview

Join the Cisco Common ASIC Group as an ASIC Verification Engineer to contribute to crafting the ASICs that power the world's data flow. This role offers a unique opportunity to gain hands-on experience in the development of high-speed networking chips.

What You Will Do

Develop and maintain advanced test benches and verification environments using System Verilog and UVM. Execute the end-to-end verification process of complex ASIC design blocks.

Why It Might Be a Fit

Strong knowledge in Digital Design and ASIC flow. Proficiency in System Verilog-based verification. Familiarity with UVM. Eagerness to learn and a proactive approach to problem-solving.

Requirements

• Bachelor's or Master's degree in Electrical & Electronics Engineering (EE) or Computer Engineering (CE)
• 0-3 years of experience in ASIC verification (including relevant internships or academic projects)
• Strong knowledge in Digital Design and ASIC flow
• Proficiency in System Verilog-based verification

Benefits

• opportunities to grow and build
• collaborating with empathy to make really big things happen on a global scale
• unparalleled security, visibility, and insights across the entire digital footprint