ASIC Design Verification Engineer

Role Overview

This role requires being onsite in San Jose, CA at least 4 days/week. The Common Hardware Group (CHG) creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally.

What You Will Do

Set vision and strategy for ASIC verification methodology and execution across multiple programs and product lines. Serve as technical authority and mentor for verification teams, fostering technical excellence and innovation.

Why It Might Be a Fit

Influence ASIC architecture and design to enable robust verification and high-quality silicon. Provide technical leadership in root cause analysis and resolution of complex issues during bring-up and post-silicon validation.

Requirements

• Bachelors + 7 years of related experience, or Masters + 4 years of related experience, or PhD + 1 year of related experience
• Experience in System Verilog, UVM, and verification methodologies including emulation
• Experience architecting verification strategies for complex ASIC programs
• Experience leading verification teams or projects
• Experience in scripting (Python, Perl) and C/C++ programming language

Benefits

• medical, dental and vision insurance
• 401(k) plan with a Cisco matching contribution
• paid parental leave
• short and long-term disability coverage
• basic life insurance
• paid time away
• volunteer time off
• annual bonuses
• performance-based incentive pay