ASIC/SOC Micro-Architect and RTL Design Engineer (Security)

MatX is seeking silicon micro-architects and design engineers to join their team as they create best-in-class silicon for high-performance and sustainable GenAI. The successful candidate will be responsible for delivering performant and functionally accurate silicon for MatX products across compute, memory management, high-speed connectivity, and other key technologies.

Requirements

• Concept-to-silicon experience in driving silicon design for subsystems and/or top-level functions with ASICs and SOCs from an architecture specification to production silicon
• Experience with SystemVerilog, Python, C/C++, Bluespec and similar scripting and programming languages for chip design and related flows
• Production-proven experience on silicon micro-architecture and design concepts used in high-performance compute (CPUs, GPUs, accelerators), high-speed connectivity, memory management and related functionalities
• Experience with testing your designs and working closely with verification teams towards performance and coverage closure goals
• Hands-on experience with design synthesis, equivalence checking, design lint, clock-domain-crossing and related flows to take designs to high quality sign-off
• Experience on DFT and physical design concepts and methodologies to achieve high test coverage and best-in-class timing, power and area for designs working with experts in these areas to take designs to sign-off

Benefits

• Health & Wellness
• Time To Recharge
• Support to Parents
• Learning & Development
• Team Connection
• Financial Wellbeing
• Flexible Spending Accounts
• Commute On Us
• MatX E[x]tras
• Remote Perks