Staff Engineer - ASIC STA

Join an inclusive team focused on innovation, working on high-speed Mixed Signal IPs and Analog intensive ASICs. Collaborate with teams to achieve closure and mentoring/coaching other design team members.

Requirements

• Highly experienced in synthesis, LEC, Low Power flows and timing closure
• Proven ability to understand a new mixed signal complex IP with minimal design team help and achieve synthesis to timing closure with 1st time silicon success.
• Handling blocks with complex designs, high frequency clocks and complex clocking
• complete understanding of timing constraints including asynchronous designs and DFT
• Have debug experience to solve issues
• scripting and automation
• Working knowledge of low power designing involving multiple power domains
• Should be able to identify and meet requirements for critical paths of multi-GHz designs

Benefits

• Equal opportunity position with excellent pay package