We're looking for a Senior ASIC Design Verification Engineer to join our team. As a key member of our organization, you will be responsible for verifying critical blocks in our inference chiplet, working cross-functionally with architecture, firmware, and design teams.
Requirements
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related technical discipline.
- 7-10+ years of hands-on verification experience spanning test plan development, simulation environment creation, test implementation, and complex debugging across diverse IP blocks, SoCs, and system-level designs.
- Demonstrated proficiency in fabric-level and chip-level verification methodologies and best practices.
- Advanced skills in SystemVerilog/Verilog, UVM methodology, and C/C++ programming, including embedded code development and validation for RISC-based processors.
Benefits
- Competitive salary and benefits package
- Flexible PTO
- 401k