IP Design Technical Lead/ Staff ASIC RTL Design Engineer
SynopsysBengaluru, Karnataka, India
Posted January 5, 2026
Full Time
About the Company
Synopsys is a global leader in engineering solutions that span the entire silicon‑to‑system lifecycle, empowering customers to accelerate the development of AI‑powered products. The company delivers cutting‑edge silicon design, semiconductor IP, electronic design automation (EDA), and simulation and analysis tools, complemented by professional design services. Synopsys distinguishes itself through deep industry partnerships that enhance R&D productivity and unlock innovative capabilities across technology sectors. Its commitment to software quality and security further ensures reliable, high‑performance solutions for complex electronic systems.
Job Description
As a IP Design Technical Lead/Staff ASIC RTL Design Engineer, you will architect and implement state-of-the-art RTL designs for the DesignWare IP family, targeting commercial, enterprise, and automotive applications. You will translate standard and functional specifications into detailed micro-architectures and comprehensive design documentation for medium to high complexity features.
Requirements
- Bachelor's or Master's degree in Electrical Engineering, Electronics, VLSI, or related field
- 4+ years of hands-on industry experience in ASIC RTL design
- Deep expertise in data path and control path design
- Proficiency in synthesizable Verilog/SystemVerilog
- Experience with high-speed design (>600MHz)
- Familiarity with industry protocols: Ethernet, DDR, PCIe, USB, MIPI-UFS/Unipro, SD-MMC, AMBA (AMBA2, AXI)
- Experience with version control systems (e.g., Perforce) and scripting languages (Perl, Shell)
Benefits
- Comprehensive range of health, wellness, and financial benefits
- Monetary and non-monetary offerings
- Salary range and benefits to be discussed during the hiring process