IP Design Technical Lead/ Staff ASIC RTL Design Engineer

We are seeking a passionate and forward-thinking digital design expert with a strong foundation in ASIC RTL design to lead and contribute to the development of state-of-the-art RTL designs for the DesignWare IP family.

Requirements

• Bachelor's or Master's degree in Electrical Engineering, Electronics, VLSI, or related field
• 8+ years of hands-on industry experience in ASIC RTL design
• Proficiency in synthesizable Verilog/SystemVerilog
• Hands on experience with creating micro-architecture/ detailed design from Functional Specifications
• Knowledge of industry protocols: Ethernet, DDR, PCIe, USB, MIPI-UFS/Unipro, SD-MMC, AMBA (AMBA2, AXI)

Benefits

• Comprehensive range of health, wellness, and financial benefits
• Total rewards include both monetary and non-monetary offerings