IP Verification (USB)- Staff Engineer
SynopsysBengaluru, Karnataka, India
Posted March 9, 2026
Full Time
About the Company
Synopsys is a global leader in engineering solutions that span the entire silicon‑to‑system lifecycle, empowering customers to accelerate the development of AI‑powered products. The company delivers cutting‑edge silicon design, semiconductor IP, electronic design automation (EDA), and simulation and analysis tools, complemented by professional design services. Synopsys distinguishes itself through deep industry partnerships that enhance R&D productivity and unlock innovative capabilities across technology sectors. Its commitment to software quality and security further ensures reliable, high‑performance solutions for complex electronic systems.
Job Description
Synopsys is seeking a Staff Engineer to join their DesignWare IP Verification R&D team. The successful candidate will have a strong background in ASIC or IP verification, with expertise in developing HVL-based verification environments and testbenches. They will be responsible for specifying, architecting, and implementing advanced verification environments for DesignWare IP cores using System Verilog and state-of-the-art methodologies.
Requirements
- BSEE with 5+ years or MSEE with 3+ years of relevant experience in ASIC or IP verification
- Expertise in developing HVL (System Verilog)-based verification environments and testbenches
- Strong hands-on experience with industry-standard simulators (VCS, NC, MTI) and debugging tools
- Proficiency in verification methodologies such as UVM, OVM, or VMM
- Solid understanding of protocols such as MIPI-I3C/UFS/Unipro, AMBA, SD/eMMC, Ethernet, DDR, PCIe, USB
Benefits
- Comprehensive range of health, wellness, and financial benefits
- Monetary and non-monetary offerings
- Paid Time Off
- 401k Matching