TetraMem is dedicated to advancing analog computing technology for AI applications. Their cutting-edge solutions deliver exceptional performance with ultra-low power consumption, making them a standout player in the industry.
Open Positions
ASIC RTL Design Engineer
MS with 5+ years of experience or PhD in Electrical Engineering with emphasis on RTL/SoC/digital design, experience with Verilog and system Verilog, and ability to work in a startup environment
Analog/Mixed-Signal IC Verification Engineer
B.S. EE, 7+ years of experience, strong understanding of analog and mixed-signal circuit design and verification principles
Memory Circuit Design Engineer
MS in Electrical Engineering, 5+ years of experience in circuit design, experience in memory circuit design
ASIC/SoC Design Verification Engineer
MS with 8+ years of relevant experience or PhD in Electrical Engineering, Computer Engineering, Computer Science or related degree. In-depth knowledge of UVM/OVM, Semiformal Verification, and hardware and software co-verification methodology
ASIC RTL/SoC Design Engineer
5+ years of experience in Electrical Engineering, Verilog, VCS, Verdi, and pre-layout simulation
ASIC Design Verification Engineer
8+ years of experience in Electrical Engineering, Computer Engineering, Computer Science or related degree, in-depth knowledge of UVM/OVM, and proficient experience with Verilog, System Verilog, and Python/Perl/TCL/Shell scripting