ASIC/SoC Design Verification Engineer

TetraMem is a fast-growing startup company working on computing platforms with unique ReRAM-based in-memory computing technologies. We are hiring in multiple positions. Collaborate with design engineers to define test plans, build infrastructure, and develop testbench for SoC design verification.

Requirements

• MS with 8+ years of relevant experience or PhD (with 3+ years of experience) in Electrical Engineering, Computer Engineering, Computer Science or related degree
• In-depth knowledge of UVM/OVM, Semiformal Verification, assertion-based verification as well as hardware and software co-verification methodology
• Proficient experience with Verilog, System Verilog, Python/Perl/TCL/Shell scripting, C/C++, System C and industry mainstream ISAs assembly coding

Benefits

• Medical
• Professional PTO
• 401k
• Other perks