ASIC Design Verification Engineer

Collaborate with design engineers to define and implement test plans for SoC design verification, develop infrastructure and automation verification, and mentor junior engineers.

Requirements

• MS with 8+ years of relevant experience or PhD (with 3+ years of experience) in Electrical Engineering, Computer Engineering, Computer Science or related degree
• In-depth knowledge of UVM/OVM, Semiformal Verification, assertion-based verification, and hardware and software co-verification methodology
• Extensive experience of building verification infrastructure, test planning, coverage closure, and testbench development
• Proficient experience with Verilog, System Verilog, Python/Perl/TCL/Shell scripting, C/C++, System C, and industry mainstream ISAs assembly coding
• Familiarity with MIPI, AMBA (APB/AHB/AXI) bus protocol, RISC-V/ARM or DSP core
• Ability to work in a startup environment and provide technical leadership to other members of the engineering team